DuckDuckWhale/yuzu
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3 Commits

Author SHA1 Message Date
fearlessTobi
63c2e32e20 Port #4182 from Citra: "Prefix all size_t with std::" 2018-09-15 15:21:06 +02:00
Lioncash
bb960c8cb4 video_core: Use nested namespaces where applicable 
Compresses a few namespace specifiers to be more compact.
 2018-07-20 18:23:54 -04:00
Subv
987a170665 GPU: Partially implemented the Maxwell DMA engine. 
Only tiled->linear and linear->tiled copies that aren't offsetted are supported for now. Queries are not supported. Swizzled copies are not supported.
 2018-06-12 11:27:36 -05:00