gdkchan c64524a240 Add ADD (zx imm12), NOP, MOV (rs), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions (#3683) ...

* Add ADD (zx imm12), NOP, MOV (register shifted), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions, fix LDRD, STRD, CBZ, CBNZ and BLX (reg)

* Bump PPTC version

2022-09-09 22:09:11 -03:00

..

CodeGen

ARMeilleure: Hardware accelerate SHA256 (#3585)

2022-08-25 10:12:13 +00:00

Common

Clean up rejit queue (#2751)

2022-09-08 20:14:08 -03:00

Decoders

Add ADD (zx imm12), NOP, MOV (rs), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions (#3683)

2022-09-09 22:09:11 -03:00

Diagnostics

Clean up rejit queue (#2751)

2022-09-08 20:14:08 -03:00

Instructions

Add ADD (zx imm12), NOP, MOV (rs), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions (#3683)

2022-09-09 22:09:11 -03:00

IntermediateRepresentation

ARMeilleure: Hardware accelerate SHA256 (#3585)

2022-08-25 10:12:13 +00:00

Memory

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Signal

Removed unused usings. (#3593)

2022-08-18 18:04:54 +02:00

State

Refactor CPU interface to allow the implementation of other CPU emulators (#3362)

2022-05-31 16:29:35 -03:00

Translation

Add ADD (zx imm12), NOP, MOV (rs), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions (#3683)

2022-09-09 22:09:11 -03:00

Allocators.cs

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ARMeilleure.csproj

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Optimizations.cs

ARMeilleure: Hardware accelerate SHA256 (#3585)

2022-08-25 10:12:13 +00:00

Statistics.cs

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