ryujinx/ARMeilleure/Instructions
gdkchan 715b605e95
Validate CPU virtual addresses on access (#1987)
* Enable PTE null checks again

* Do address validation on EmitPtPointerLoad, and make it branchless

* PTC version increment

* Mask of pointer tag for exclusive access

* Move mask to the correct place

Co-authored-by: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>
2021-02-16 19:04:19 +01:00
..
CryptoHelper.cs
InstEmitAlu32.cs Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775) 2020-12-17 20:43:41 +01:00
InstEmitAlu.cs
InstEmitAluHelper.cs
InstEmitBfm.cs
InstEmitCcmp.cs
InstEmitCsel.cs
InstEmitDiv.cs
InstEmitException32.cs
InstEmitException.cs
InstEmitFlow32.cs
InstEmitFlow.cs
InstEmitFlowHelper.cs
InstEmitHash32.cs
InstEmitHash.cs
InstEmitHashHelper.cs
InstEmitHelper.cs
InstEmitMemory32.cs
InstEmitMemory.cs
InstEmitMemoryEx32.cs
InstEmitMemoryEx.cs Implement PRFM (register variant) as NOP (#1956) 2021-01-26 16:09:27 +11:00
InstEmitMemoryExHelper.cs Validate CPU virtual addresses on access (#1987) 2021-02-16 19:04:19 +01:00
InstEmitMemoryHelper.cs Validate CPU virtual addresses on access (#1987) 2021-02-16 19:04:19 +01:00
InstEmitMove.cs
InstEmitMul32.cs Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775) 2020-12-17 20:43:41 +01:00
InstEmitMul.cs
InstEmitSimdArithmetic32.cs CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817) 2021-01-04 23:45:54 +01:00
InstEmitSimdArithmetic.cs Lower precision of estimate instruction results to match Arm behavior (#1943) 2021-01-28 10:23:00 +11:00
InstEmitSimdCmp32.cs
InstEmitSimdCmp.cs
InstEmitSimdCrypto32.cs
InstEmitSimdCrypto.cs
InstEmitSimdCvt32.cs CPU: Implement VRINTX.F32 | VRINTX.F64 (#1776) 2020-12-16 20:27:15 -03:00
InstEmitSimdCvt.cs
InstEmitSimdHash.cs
InstEmitSimdHelper32.cs CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817) 2021-01-04 23:45:54 +01:00
InstEmitSimdHelper.cs Add VCLZ.* fast path (#1917) 2021-01-25 10:01:25 +11:00
InstEmitSimdLogical32.cs
InstEmitSimdLogical.cs
InstEmitSimdMemory32.cs
InstEmitSimdMemory.cs
InstEmitSimdMove32.cs
InstEmitSimdMove.cs
InstEmitSimdShift32.cs
InstEmitSimdShift.cs
InstEmitSystem32.cs
InstEmitSystem.cs
InstName.cs Implement PRFM (register variant) as NOP (#1956) 2021-01-26 16:09:27 +11:00
NativeInterface.cs PPTC Follow-up. (#1712) 2020-12-17 20:32:09 +01:00
SoftFallback.cs CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817) 2021-01-04 23:45:54 +01:00
SoftFloat.cs