ryujinx/ARMeilleure/Instructions
sharmander 3332b29f01
CPU: Implement VFMA (Vector) (#1762)
* Implement VFMA.F64

* Simplify switch

* Simplify FMA Instructions into their own IntrinsicType.

* Remove whitespace

* Fix indentation

* Change tests for Vfnms -- disable inf / nan

* Move args up, not description ;)

* Implementation Complete.

All Tests Pass (Slow / Fast Path)

* Move location of function in assembler + test updates.

* Shift params upwards

* Remove unused function

* Update PTC version.

* Add comments / re-oreder opcode table.

* Remove whitespace

* Fix nit

* Fix nit.

* Fix whitespace

* Wrong opcode was used by a bad merge.

* Addressed rip's comments.
2020-12-15 00:01:52 -03:00
..
CryptoHelper.cs
InstEmitAlu32.cs
InstEmitAlu.cs
InstEmitAluHelper.cs
InstEmitBfm.cs
InstEmitCcmp.cs
InstEmitCsel.cs
InstEmitDiv.cs
InstEmitException32.cs IPC refactor part 1: Use explicit separate threads to process requests (#1447) 2020-09-22 14:50:40 +10:00
InstEmitException.cs IPC refactor part 1: Use explicit separate threads to process requests (#1447) 2020-09-22 14:50:40 +10:00
InstEmitFlow32.cs
InstEmitFlow.cs
InstEmitFlowHelper.cs
InstEmitHash32.cs
InstEmitHash.cs
InstEmitHashHelper.cs
InstEmitHelper.cs
InstEmitMemory32.cs
InstEmitMemory.cs
InstEmitMemoryEx32.cs
InstEmitMemoryEx.cs
InstEmitMemoryExHelper.cs Fix register read after write on STREX implementation (#1801) 2020-12-13 12:19:38 -03:00
InstEmitMemoryHelper.cs Memory Read/Write Tracking using Region Handles (#1272) 2020-10-16 17:18:35 -03:00
InstEmitMove.cs
InstEmitMul32.cs Add Umaal & Vabd_I, Vabdl_I, Vaddl_I, Vhadd, Vqshrn, Vshll inst.s (slow paths). (#1577) 2020-10-13 22:41:33 +02:00
InstEmitMul.cs
InstEmitSimdArithmetic32.cs CPU: Implement VFMA (Vector) (#1762) 2020-12-15 00:01:52 -03:00
InstEmitSimdArithmetic.cs Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630) 2020-12-07 10:37:07 +01:00
InstEmitSimdCmp32.cs
InstEmitSimdCmp.cs
InstEmitSimdCrypto32.cs
InstEmitSimdCrypto.cs
InstEmitSimdCvt32.cs
InstEmitSimdCvt.cs CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & Fcvtn_V Instructions. Now HardwareCapabilities uses CpuId. (#1650) 2020-11-18 19:35:54 +01:00
InstEmitSimdHash.cs
InstEmitSimdHelper32.cs CPU: Implement VFMA (Vector) (#1762) 2020-12-15 00:01:52 -03:00
InstEmitSimdHelper.cs Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630) 2020-12-07 10:37:07 +01:00
InstEmitSimdLogical32.cs
InstEmitSimdLogical.cs
InstEmitSimdMemory32.cs
InstEmitSimdMemory.cs
InstEmitSimdMove32.cs
InstEmitSimdMove.cs
InstEmitSimdShift32.cs Add Umaal & Vabd_I, Vabdl_I, Vaddl_I, Vhadd, Vqshrn, Vshll inst.s (slow paths). (#1577) 2020-10-13 22:41:33 +02:00
InstEmitSimdShift.cs
InstEmitSystem32.cs
InstEmitSystem.cs
InstName.cs CPU: Implement VFNMA.F32 | F.64 (#1783) 2020-12-07 21:04:01 -03:00
NativeInterface.cs Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630) 2020-12-07 10:37:07 +01:00
SoftFallback.cs
SoftFloat.cs