ryujinx/ARMeilleure
gdkchan f0824fde9f
Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015)
* Add host CPU memory barriers for DMB/DSB and ordered load/store

* PPTC version bump

* Revert to old barrier order
2022-01-21 12:47:34 -03:00
..
CodeGen Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015) 2022-01-21 12:47:34 -03:00
Common Optimize LSRA (#2563) 2021-10-08 18:15:44 -03:00
Decoders Implement FCVTNS (Scalar GP) (#2953) 2022-01-19 22:21:44 -03:00
Diagnostics Add an early TailMerge pass (#2721) 2021-10-18 19:51:22 -03:00
Instructions Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015) 2022-01-21 12:47:34 -03:00
IntermediateRepresentation Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015) 2022-01-21 12:47:34 -03:00
Memory Replace CacheResourceWrite with more general "precise" write (#2684) 2021-09-29 02:27:03 +02:00
Signal Remove usage of Mono.Posix.NETStandard accross all projects (#2906) 2021-12-08 18:24:26 -03:00
State Implement a "Pause Emulation" option & hotkey (#2428) 2021-09-11 22:08:25 +02:00
Translation Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015) 2022-01-21 12:47:34 -03:00
Allocators.cs Optimize LSRA (#2563) 2021-10-08 18:15:44 -03:00
ARMeilleure.csproj Remove usage of Mono.Posix.NETStandard accross all projects (#2906) 2021-12-08 18:24:26 -03:00
Optimizations.cs
Statistics.cs